Replacing the ADS1298 with the GXSC AFE for Brain Activity Score (BIS) Applications

The Brain Activity Score (BIS) is a core neurophysiological indicator used to quantify a patient’s level of consciousness and help determine the depth of sedation. The monitoring system’s workflow consists of EEG signal acquisition—signal conditioning—analog-to-digital conversion—algorithmic analysis. The accuracy and reliability of BIS values depend on EEG signal acquisition. Since EEG signals have weak amplitudes, a narrow frequency range, and are susceptible to environmental noise such as power-line interference and electromyographic interference, a low-noise, high-precision, and interference-resistant acquisition device is required.

GXSC’s eight-channel, 24-bit physiological signal acquisition analog front end, with its extremely high integration, enables EEG monitoring systems to achieve more efficient and accurate diagnostic and monitoring capabilities. The chip integrates the core functions required for BIS monitoring, including a programmable gain amplifier, analog-to-digital converter, internal reference, oscillator, lead disconnection detection, and right-leg drive amplifier. There is no need to build complex front-end conditioning circuits, which significantly simplifies the hardware design of BIS monitoring devices, reduces PCB layout space, and meets the miniaturization requirements of portable devices. Its programmable gain range is 1, 2, 3, 4, 6, 8, or 12, allowing flexible adjustment of gain based on EEG signal amplitude to ensure the signal remains within the optimal acquisition range.

The chip features 8-channel synchronous sampling capability, with each channel configurable independently. It supports single-ended or differential inputs, perfectly meeting the multi-channel EEG acquisition requirements of BIS monitoring. The data rate can be flexibly configured between 250 SPS and 32 kSPS. For the EEG signal frequency bands used in BIS monitoring, the data rate can be set to 250 SPS to 1 kSPS, ensuring signal acquisition integrity while avoiding data redundancy.

Key features of the GXSC analog front-end chip are as follows:

• Data rate: 31.25 SPS to 32 kSPS

• Programmable gain: 1, 2, 3, 4, 6, 8, or 12

• Ultra-low input reference noise: 4.07 μVpp (0.64 μVrms) (BW=150 Hz, G=6)

• CMRR: 120 dB

• Flexible power modes: High-Speed (HS), Low-Power (LP), and Ultra-Low-Power (ULP)

• In Low-Power mode, power consumption is only 410 µW (AVDD = 3 V, DVDD = 1.8 V, ODR = 500 SPS, G = 6)

• Built-in low-drift reference; built-in clock with adjustable frequency and external output capability

• Built-in right-lead drive amplifier, lead disconnection detection, temperature sensor, and test signal

• Supports digital pacing detection

• Adjustable data buffer depth (1/2/4/8/16/32)

• Offset/Gain error calibration function

• Power supply range: Analog supply: 2.7V to 5.25V; Digital supply: 1.8V to 5.25V

• Flexible power-down and standby modes

• SPI interface

• Operating temperature range: -40°C to +85°C