GXSC ADC Replaces AD9633 in RF Signal Acquisition Cards

RF signal acquisition cards are primarily designed to receive and condition spatial RF signals and equipment IF signals, as well as to perform high-precision digital acquisition. The overall chain consists of an RF analog front end, a signal conditioning module, a high-speed analog-to-digital conversion module, a data transmission module, and an FPGA-based master control processing module. Modern RF signals are characterized by wide instantaneous bandwidth, large dynamic range, multi-channel parallel transmission, and stringent timing synchronization requirements, necessitating a high-speed multi-channel analog-to-digital converter for signal acquisition.

The GXSC ADC offers a hardware and software replacement for ADI‘s AD9633, featuring four-channel synchronous operation, high-speed broadband capability, low noise with high dynamic performance, and programmable configuration. It has been widely adopted in medical, communications, industrial, and other fields, making it the optimal front-end solution for a new generation of lightweight, high-performance RF signal acquisition cards.

The GXSC ADC features an on-chip sample-and-hold circuit and is designed for low cost, low power consumption, small size, and ease of use. The product operates at conversion rates up to 125 MSPS and is optimized for applications where small package size is critical, delivering excellent dynamic performance with low power consumption. The chip requires a single 1.8 V supply and a sampling clock compatible with LVPECL/CMOS/LVDS levels to achieve full performance. In many applications, no external reference or driver components are required.

The key features of the GXSC ADC are as follows:

• 1.8 V power supply operation

• Low power consumption: 100 mW per channel at 125 MSPS, with scalable power options

• Signal-to-Noise Ratio (SNR) = 71 dB (up to Nyquist frequency)

• Spurious-Free Dynamic Range (SFDR) = 91 dBc (up to Nyquist frequency)

• Differential Nonlinearity (DNL) = ±0.3 LSB (typical); Integral Nonlinearity (INL) = ±0.5 LSB (typical)

• Serial LVDS with low-power, simplified signal options

• 650 MHz full-power analog bandwidth

• 2 Vp-p input voltage range

• Serial port control

• Full-chip and per-channel shutdown modes

• Built-in and custom digital test pattern generation

• Multi-chip synchronization and clock divider

• Programmable output clock and data alignment