GXSC ADC Replaces AD9653 in Fiber-Optic Hydrophone Detection Applications

A fiber-optic hydrophone detection system is composed of fiber-optic hydrophone arrays and other components. The core component, the fiber-optic hydrophone, converts underwater acoustic vibrations into optical signals, which are then transmitted via optical fiber to a signal processing system for acoustic signal extraction. This technology is fundamental to underwater target monitoring and marine environmental observation. Fiber-optic hydrophone detection systems offer advantages such as immunity to electromagnetic interference, ultra-low noise, long-distance transmission, and suitability for large-scale array networking. The high precision and high sampling rate of the back-end analog-to-digital conversion unit play a decisive role in system performance. This system can utilize GXSC‘s 16-bit, quad-channel, 125MSPS analog-to-digital converter as a pin-to-pin replacement for the AD9653, fully meeting the digitization and acquisition requirements of weak signals from fiber-optic hydrophones.

The GXSC ADC integrates a sample-and-hold circuit and is specifically designed for low cost, low power consumption, small size, and ease of use, making it well-suited for underwater applications. It achieves a maximum conversion rate of 125MSPS with outstanding dynamic performance and low power consumption. The chip operates on a single 1.8V power supply and supports sampling clocks compatible with LVPECL, CMOS, and LVDS logic levels to deliver optimal performance. For most applications, no additional reference or driver components are required.

GXSC ADC Features:

Quad-channel, low-power, high-speed pipelined ADC with internal clock buffer and reference

Data rate: 20Msps to 125Msps

Signal-to-Noise Ratio (SNR):

77.9dBFS @ Vref = 1V, fIN = 10MHz

72.2dBFS @ Vref = 1V, fIN = 200MHz

Spurious-Free Dynamic Range (SFDR):

96.66dBFS @ Vref = 1V, fIN = 10MHz

78.8dBFS @ Vref = 1V, fIN = 10MHz

1.8V power consumption: 170mW per channel @ 125Msps

Integrated internal reference and clock buffer

Analog input bandwidth: 650MHz

2Vpp input voltage range, with support for extension up to 2.6Vpp

Differential Non-Linearity (DNL) = ±0.7 LSB; Integral Non-Linearity (INL) = ±3.5 LSB

Flexible power-down and standby modes with independently controllable channels; flexible output code formats; support for multi-chip synchronization and clock division

Operating temperature range: -40°C to +125°C

The GXSC ADC incorporates an internal PLL that automatically increases the frequency based on the sampling clock to generate the output sampling clock for serial data. The output data clock (DCO) is used to receive serial output bits, while the frame clock output is used to flag the output data byte signal. The device supports independent channel power-down; when all channels are disabled, power consumption is typically less than 2mW.