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Replacing the ADS1299, the GXSC AFE GX1299 Is Applied to SSVEP EEG Signal Acquisition

Time:2026-09-30 Views:8
The SSVEP signal acquisition system is a typical embedded bioelectrical signal processing platform. Its goal is to achieve high-precision, low-latency, real-time steady-state visual evoked potential signal acquisition and recognition. When a subject gazes at a visual stimulus flickering at a specific frequency, the brain generates a periodic electrophysiological response highly correlated with the stimulation frequency and its harmonics. It has advantages such as high signal-to-noise ratio, high information transfer rate, a simple paradigm, and low user training cost, and is therefore widely used in high-speed BCI spellers, intelligent wheelchair control, and neurofeedback training.
This system often uses the ADS1299 as the core analog front end. GXSC has launched an AFE chip that is software- and hardware-compatible with the ADS1299. It features 24-bit high resolution, low noise, and low power consumption, and integrates many EEG and ECG functions, making it very suitable for ECG and EEG applications. These functions can also be disabled for use in high-performance, multi-channel data acquisition systems.
The GX1299 has an input noise of 4.11 μVpp (0.64 μVrms) (BW = 112.5 Hz, G = 6), enabling precise capture of weak ECG features. It integrates a programmable gain amplifier, an internal reference, and a built-in oscillator. Designed for ECG application scenarios, it provides functions such as respiration detection, right leg drive, lead-off detection, pace detection, and WCT, and can switch to the internal clock and internal reference, thereby simplifying the ECG peripheral circuit and greatly reducing the size, power consumption, and cost of the application product.
The main features of the GX1299 are as follows:
Data rate: 31.25 SPS to 32 kSPS
Programmable gain: 1, 2, 3, 4, 6, 8, or 12
Ultra-low input-referred noise: 4.07 μVpp (0.64 μVrms) (BW = 150 Hz, G = 6)
CMRR: 120 dB
Flexible power consumption modes: high-speed mode (HS), low-power mode (LP), ultra-low-power mode (ULP)
Low-power mode with power consumption of only 410 µW (AVDD = 3 V, DVDD = 1.8 V, ODR = 500 SPS, G = 6)
Built-in low-drift reference; built-in clock, capable of external output, with adjustable frequency
Built-in right leg drive amplifier, lead-off detection, temperature sensor, and test signal
Supports digital pace detection
Adjustable data buffer depth (1/2/4/8/16/32)
Offset/Gain error calibration function
Power supply range: analog supply: 2.7 V to 5.25 V; digital supply: 1.8 V to 5.25 V
Flexible power-down and standby modes
SPI interface
Operating temperature range: -40°C to +85°C