Industrial surveying LiDAR can use high sampling rate analog-to-digital converters GX10D1000/GX10D1500 to replace ADC10D1000/ADC10D1500

In industrial surveying and mapping scenarios, laser radar is widely used, which can ensure high-resolution and long-distance detection, effectively improve the efficiency and accuracy of operations, and reduce operating costs. This scenario requires breakthroughs in the three dimensions of cost, reliability, and adaptability for LiDAR. The Guoxin Sichen high sampling rate analog-to-digital converter GX10D1000/GX10D1500 maintains the same performance as similar foreign products while also considering lower power consumption, providing a better solution for laser radar systems. For example, GX10D1500, with a sampling rate of up to 1.5GSPS and a single 1.9V power supply, has a typical power consumption of only 1.88W in non multiplex mode, which is nearly 50% lower than its competitors.

The GX10D1000/GX10D1500 analog-to-digital converter adopts a multi-stage differential pipeline architecture and is equipped with a dual channel, 10 bit, 1.0/1.5GSPS analog-to-digital converter with built-in high-performance sample and hold circuit and on-chip reference voltage source. These two chips have outstanding dynamic performance and low power consumption characteristics. The GX10D1500, powered by a 1.9V power supply, can generate 8.36 significant bits (EN0B) and provide a 10-18 bit error rate (CER) at an input signal of 103MHz and a sampling rate of 1.5GSPS. The typical power consumption in the Non-d é mux mode of 1.5GSPS is 1.88W. The GX10D1000 can generate 8.62 significant bits (ENOB) at an input signal of 103MHz and a sampling rate of 1.0GSPS, and the typical power consumption in the Non-d é mux mode of 1.0GSPS is 1.72W.

For the convenience of data capture, each channel of the chip has its own independent DDR data clock DCLKI and DCLKQ, and GX10D1000 supports a 1:2 Demux mode, in which the second set of 10 bit LVDS buses for each channel is activated, and the output data rate becomes half of the clock rate. The output format can be configured as offset binary (default) or binary complement, and the low voltage differential signaling (LVDS) digital output is compatible with IEEE 1596.3-1996, with adjustable common mode voltage of 0.8V or 1.2V.

Main performance:

• Excellent precision and dynamic performance

Low power consumption, further reducing at lower sampling rates

Internal termination, buffering, differential analog input

SPI serial control interface output test mode

1:1 Non demux or 12Demux LVDS output

The automatic synchronization feature of multi chip systems

Single channel 1.9V ± 0.1V power supply

Adopting a 144 pin HLQFP package with a center pad

The rated industrial temperature range is -40 ° C to+125 ° C