GXSC Analog-to-Digital Converter Replaces AD9653 in Quadrature Wireless Receivers

A quadrature receiver employs orthogonal transformation to decompose received RF signals into two mutually orthogonal components, enabling independent processing and demodulation of these components. This decomposition simplifies signal processing workflows while enhancing system interference immunity and spectral efficiency. The RF front end of a quadrature receiver receives RF signals from the antenna and converts them via ADC into intermediate frequency (IF) or baseband signals suitable for subsequent circuit processing.

The digital link of a quadrature wireless receiver must achieve synchronous acquisition, high-precision conversion, and efficient transmission of both I and Q signals. It must ensure timing consistency and amplitude matching between the two signals while accommodating wideband signal processing, complex interference suppression, and miniaturized integration requirements. This paper recommends the GXSC 16-bit, four-channel, 125 MSPS analog-to-digital converter (ADC) for this solution. Designed specifically for medical imaging and communications applications, this ADC features high channel density, low power consumption, and a compact size, offering system engineers greater design flexibility and lower per-channel data conversion costs.

The GXSC ADC incorporates an internal sample-and-hold circuit, specifically engineered for low-cost, low-power, compact, and easy-to-use applications. It supports pin-to-pin replacement for ADI‘s AD9653. Capable of conversion rates up to 125 MSPS, this product delivers outstanding dynamic performance and low power consumption, making it ideal for applications requiring small package sizes. Additionally, the chip operates on a single 1.8V supply and utilizes LVPECL/CMOS/LVDS-compatible sampling rate clock signals to maximize performance. For most applications, no external reference power source or driver components are required.

Modern quadrature wireless receivers must support multiple communication standards, demanding stringent bandwidth performance and input adaptability from ADCs. This GXSC analog-to-digital converter delivers 650MHz full-power analog bandwidth, enabling direct integration with receiver intermediate frequency (IF) links without additional mixing conditioning stages. This significantly simplifies link design and reduces signal loss. Supporting a wide input voltage range from 2.0Vp-p to 2.6Vp-p, combined with its differential input architecture, it flexibly adapts to I/Q signals of varying strengths. Signal amplitude matching is achieved without additional gain conditioning circuits, enhancing link adaptability.

Key Performance Features of the GXSC Analog-to-Digital Converter:

• 1.8V analog supply voltage

• 1.8V digital output supply voltage

• Low power consumption: 495mW (at 125MSPS)

• Signal-to-noise ratio (SNR): 76dBFS (fin=30.5MHz @ 125MSPS)

• Spurious-free dynamic range (SFDR): 77dBc (fin=30.5MHz@125MSPS)

• On-chip reference voltage source and sample-and-hold circuit

• QFN-64 package, 9mm×9mm

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