GXSC four channel 24 bit AFE replaces ADS1294R for EMG application

EMG (electromyography) chart is used to measure and analyze the electromyographic signals emitted during muscle contraction, representing the level of muscle activity, and can be used to study muscle function. EMG signal analysis can be widely applied in muscle work ergonomics analysis, operational posture analysis, rehabilitation status functional evaluation, fatigue recognition, as well as EMG prosthetic control and action mode research.

EMG signals are the biological currents generated by the contraction of human surface muscles. The acquisition process not only requires precise capture of micro amplitude signals, but also effective suppression of power frequency interference, electrode artifacts, and physiological noise. At the same time, the demand for multi-channel synchronous acquisition is becoming increasingly prominent to adapt to complex muscle group monitoring. The four channel 24 bit bioelectric simulation front-end of GXSC, with its low-noise programmable gain amplifier, synchronous sampling architecture, integrated anti-interference module, and medical grade reliability, perfectly matches the measurement needs of electromyographic signals, becoming a key device for simplifying the acquisition link and improving signal quality.

The GXSC‘s four channel 24 bit AFE features high precision, low noise, high common mode rejection ratio, low-power design, and integrated bioelectric specific functions. It can replace ADS1294 with 100% software and hardware for electromyographic (EMG) signal measurement. The AFE has a built-in programmable gain amplifier (PGA), internal reference, and built-in oscillator, and also integrates common functions required for EEG and ECG applications. The extremely high integration of the chip can significantly reduce product size, power consumption, and overall cost.

GXSC AFE operates at an output rate of 250SPS~64kSPS. At an output rate of 250SPS, it can achieve an IRN performance of 1.28 μ Vpp (0.23 μ Vrms); At 64kSPS, it has a -3dB bandwidth of 14.4kHz. Equipped with pull-up/pull-down resistors, excitation current traps/sources, and AC lead detection functions. In addition, the chip has a daisy chain configuration, which can solve the problem of cascading data in high channel systems. The digital cache function with a maximum depth of 16 can minimize the frequency of data retrieval, thereby reducing system power consumption. Main features introduction:

Input reference noise: 1.28yVpp (0.23uVrms); (BW=70Hz,G=24)

Data rate: 250SPS to 64kSPS

Common mode rejection ratio (CMRR): -118dB

Programmable gains: 1, 2, 3, 4, 6, 8, 12, 24

Single pole power supply, analog power supply: 2.75V to 5.25V; digital power supply: 1.8V to 3.6V

Built in or external reference, built-in or external clock, internal clock can output

Built in bias amplifier, lead dropout detection, temperature sensor

Test signal and power measurement functions

Supports up to 16 depth digital cache function

Flexible power-off and standby modes

SPI interface, supports daisy chain

Excellent ESD capability, HBM：+8000V； CDM：±1500V；Latch-Up：600mA

Working temperature range: -40 ° C to+85 ° C