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PLL (Phase-Locked Loop)
PLL (Phase-Locked Loop)
| 产品族 | 产品型号 | 产品描述 | 工作电压(V) | 接口 | 工作环境温度 | 频率(Hz) | 封装 | 规格书 |
|---|---|---|---|---|---|---|---|---|
| Wideband RF Frequency Synthesizer | GX9311 | PLL: 32-bit fractional-N / integer-N ;Reference input: 10–150 MHz; Maximum PFD frequency: 300 MHz ;RF output: Differential ;RMS jitter: 90 fs integer / 120 fs fractional, typ. ;(PFD = 100 MHz; integration: 1 kHz–100 MHz; VCC = VIO = 3.3 V; 25°C) Output-po | 3.15–3.45 V (3.3 V nominal) VIO = VCC for specified tests | SPI MUXout: Register readback or lock status | −40°C to +85°C | 10 MHz to 8.5 GHz (RF output) | QFN-28 (4 mm × 4 mm) | / |
| PLL FM Demodulator | GX6711 | FM deviation: ±10 MHz ;Input power range: −40 to +15 dBm (typ.); Input / output impedance: 50 Ω / 75 Ω (typ.) Output: Analog video baseband Maximum output signal frequency: Up to 10 MHz; Maximum output amplitude: Up to 2 Vp-p; RSSI detector ADC: 7-bit ;SP | 2.5 V: Digital, baseband, VCO 3.3 V: Video amplifier | SPI (separate data input and readback output) | −40°C to +85°C | 480 MHz nominal (FM demodulation center) | QFN | / |
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